Methods of forming different sized patterns

ABSTRACT

A method includes forming a template portion to provide a first opening trench portion surrounding a first isolated pattern, and forming an array of pillars on an underlying layer; forming a separation wall layer including first separation wall portions surrounding sidewalls of the pillars, and forming second separation wall portions covering sidewalls of the first opening trench portion; forming a block copolymer layer on the separation wall layer; forming first domains in gaps between the pillars, and forming second domains surrounding and separating the first domains by annealing the block copolymer layer; forming second openings by selectively removing the first domains; forming third openings between the second openings, and forming a fourth opening adjacent to the first isolated pattern by selectively removing the pillars and the template portion; and forming fifth openings, which extend from the second and third openings and penetrate the underlying layer, and forming a sixth opening, which extends from the fourth opening and penetrates the underlying layer.
CROSS-REFERENCE TO RELATED APPLICATION

This is a continuation application of Ser. No. 14/850,419, field on Sep.10, 2015, entitled METHODS OF FORMING DIFFERENT SIZED PATTERNS, whichclaims priority of Korean patent application number 10-2015-0048672filed on Apr. 6, 2015. The disclosure of each of the foregoingapplications is incorporated herein by reference in its entirety.
BACKGROUND

1. Technical Field

Various embodiments of the present disclosure relate to semiconductortechnologies and, more particularly, to methods of forming patternshaving different critical dimensions (CDs).
 2. Related Art

To increase integration density of semiconductor devices comprised ofintegrated circuits, it may be necessary to reduce an area occupied by aunit cell of the semiconductor devices and to increase the number ofdiscrete devices such as transistors, resistors, capacitors or the like,integrated in a limited area of a semiconductor substrate. Varioustechniques have been attempted to realize fine pattern structures havinga nano-scale critical dimension (CD), that is, a size ranging from a fewnanometers to several tens of nanometers.
It is difficult to form nano-scale fine patterns of the semiconductordevices only with a photolithography process. Image resolution limits oflithography apparatuses for the photolithography process may be causedby the nature of optical systems for the photolithography process andwavelengths of lights generated from light sources of the opticalsystems. Methods of forming the fine patterns through a self-assembly ofpolymer molecules may be considered as a candidate for overcoming theimage resolution limits. However, it is difficult to merely apply adirect self-assembly (DSA) of polymer molecules to methods of forming aplurality of patterns having different pitches for example, differentwidths or different spaces. Accordingly, it is necessary to furtherdevelop the methods of forming fine patterns using DSA of the polymermolecules to overcome the limitations of DSA technology.
SUMMARY

Various embodiments are directed to methods of forming different sizedpatterns.
 According to an embodiment, there is provided a method of formingpatterns. The method may include: forming a template portion to providea first opening trench portion surrounding a first isolated pattern, andforming an array of pillars on an underlying layer; forming a separationwall layer including first separation wall portions surroundingsidewalls of the pillars, and forming second separation wall portionscovering sidewalls of the first opening trench portion; forming a blockcopolymer layer on the separation wall layer; forming first domains ingaps between the pillars, and forming second domains surrounding andseparating the first domains by annealing the block copolymer layer;forming second openings by selectively removing the first domains;forming third openings between the second openings, and forming a fourthopening adjacent to the first isolated pattern by selectively removingthe pillars and the template portion; and forming fifth openings, whichextend from the second and third openings and penetrate the underlyinglayer, and forming a sixth opening, which extends from the fourthopening and penetrates the underlying layer.
 According to another embodiment, there is provided a method of formingpatterns. The method may include: forming a template portion to providea first opening trench portion surrounding a first isolated pattern, andforming an array of pillars on an underlying layer; forming a separationwall layer that covers the pillars, the first isolated pattern and thetemplate portion; forming a block copolymer layer that fills gapsbetween the pillars and fills a gap between the first isolated patternand the template portion; forming first domains in the gaps between thepillars, forming second domains surrounding and separating the firstdomains, forming a third domain in the first opening trench portion, andforming a fourth domain surrounding the third domain, by annealing theblock copolymer layer, wherein the third domain is shallower than thefirst domains and a bottom portion of the fourth domain is thicker thanbottom portions of the second domains; forming second openings byremoving the first domains, and forming a seventh opening by removingthe third domain; forming first extensions of the second openings, whichpenetrate the bottom portions of the second domains, and an extension ofthe seventh opening in the fourth domain without penetration of thebottom portion of the fourth domain, by etching the second and fourthdomains; forming second extensions of the second openings, and exposingtop surfaces of the pillars, a top surface of the first isolated patternand a top surface of the template portion, by selectively removingportions of the separation wall layer exposed by the first extensions ofthe second openings; forming third openings by selectively removing thepillars, and forming a fourth opening by selectively removing thetemplate portion; and forming fifth openings that penetrate theunderlying layer and extend from the second and third openings, andforming a sixth opening that penetrates the underlying layer and extendsfrom the fourth opening.
 According to another embodiment, there is provided a method of formingpatterns. The method may include: forming a template portion to providea first opening trench portion surrounding a first isolated pattern, andforming an array of pillars on an underlying layer; forming a separationwall layer that covers the pillars, the first isolated pattern and thetemplate portion; forming a block copolymer layer that fills gapsbetween the pillars and fills a gap between the first isolated patternand the template portion; forming first domains in the gaps between thepillars, forming second domains surrounding and separating the firstdomains, forming a third domain in the first opening trench portion, andforming a fourth domain surrounding the third domain, by annealing theblock copolymer layer, wherein the third domain is shallower than thefirst domains and a bottom portion of the fourth domain is thicker thanbottom portions of the second domains; forming second openings byremoving the first domains, and forming a seventh opening by removingthe third domain; forming first extensions of the second openings whichpenetrate the bottom portions of the second domains, and an extension ofthe seventh opening in the fourth domain without penetration of thebottom portion of the fourth domain, by etching the second and fourthdomains; forming second extensions of the second openings, and exposingtop surfaces of the pillars, a top surface of the first isolated patternand a top surface of the template portion, by selectively removingportions of the separation wall layer exposed by the first extensions ofthe second openings; forming a blocking pattern that covers the firstisolated pattern and a portion of the template portion adjacent to thefirst isolated pattern; forming third openings by selectively removingthe pillars using the blocking pattern as an etch mask, and forming afourth opening by selectively removing the template portion; and formingfifth openings that penetrate the underlying layer and extend from thesecond and third openings, and forming a sixth opening that penetratesthe underlying layer and extends from the fourth opening.
 According to another embodiment, there is provided a method of formingpatterns. The method may include: forming a template portion to providea first opening trench portion surrounding a first isolated pattern, andforming an array of pillars on an underlying layer; forming a separationwall layer including separation wall portions that cover sidewalls ofthe pillars and sidewalls of the first openings; forming a blockcopolymer layer on the separation wall layer; forming first domains ingaps between the pillars, forming second domains surrounding andseparating the first domains, forming third domains in the firstopenings, and forming fourth domains surrounding the third domains, byannealing the block copolymer layer; forming second openings in the gapsbetween the pillars, and forming third openings in the first openings,by selectively removing the first domains and the third domains; formingfourth openings by selectively removing the pillars; and forming fifthopenings that penetrate the underlying layer and extend from the secondand fourth openings, and forming sixth openings that penetrate theunderlying layer and extend from the third openings.
 BRIEF DESCRIPTION OF THE DRAWINGS

Various embodiments of the present disclosure will become more apparentin view of the attached drawings and accompanying detailed description,in which:

FIGS. 1 to 3 are plan views illustrating a process for obtaining alayout of a guide pattern used in a method of forming patterns accordingto an embodiment;

FIG. 4 is a plan view illustrating a layout of a blocking pattern usedin a method of forming patterns according to an embodiment;

FIGS. 5 to 18 are cross-sectional views illustrating a method of formingpatterns according to an embodiment;

FIGS. 19 to 22 are plan views illustrating a process for obtaining alayout of a guide pattern used in a method of forming patterns accordingto another embodiment;

FIGS. 23 to 48 are cross-sectional views illustrating a method offorming patterns according to another embodiment;

FIGS. 49 and 50 are plan views illustrating a process for obtaining alayout of a guide pattern used in a method of forming patterns accordingto still another embodiment; and

FIGS. 51 to 53 are schematic views illustrating phase separations ofblock copolymer (BCP) layers used in exemplary embodiments.
DETAILED DESCRIPTION OF THE EMBODIMENTS

It will be understood that although the terms first, second, third etc.may be used herein to describe various elements, these elements shouldnot be limited by these terms. These terms are only used to distinguishone element from another element. Thus, a first element in exemplaryembodiments could be termed a second element in other embodimentswithout departing from the teachings of the present disclosure.
 It will also be understood that when an element is referred to as beinglocated “under”, “beneath,” “below”, “lower,” “on”, “over”, “above,”“upper”, “side” or “aside” another element, it can be directly contactthe other element, or at least one intervening element may also bepresent therebetween. Accordingly, the terms such as “under”, “beneath,”“below”, “lower,”, “on”, “over”, “above,” “upper”, “side”, “aside” andthe like which are used herein are for the purpose of describingparticular embodiments only and are not intended to limit the scope ofthe present disclosure. Other words used to describe the relationshipbetween elements or layers should be interpreted in a like fashion forexample, “between” versus “directly between” or “adjacent” versus“directly adjacent”.
In the following embodiments, the term “dense patterns” may be used todescribe patterns having a relatively small pitch size and a relativelyshort distance therebetween, and the term “isolated patterns” may beused to describe patterns having a relatively large pitch size and arelatively long distance therebetween. In addition, the term “regularlyarrayed patterns” may be used to describe patterns arrayed to have auniform pitch size and substantially the same distance therebetween, andthe term “irregularly arrayed patterns” may be used to describe patternsarrayed to have non-uniform pitch sizes or different distancestherebetween. The term “irregularly arrayed patterns” may also be usedto describe patterns randomly arrayed without any regularity.
 Exemplary embodiments of the present disclosure may provide methods offorming fine patterns through a phase separation of a block copolymer(BCP) layer so that the patterns have a line width less than aresolution limit of exposure apparatuses. For example, exemplaryembodiments of the present disclosure may provide methods of forming anarray of contact holes or an array of cutting holes for cuttingline-shaped patterns through a direct self-assembly (DSA) technique ofthe BCP layer. Specific polymer blocks included in the BCP layer may beordered and phase-separated from a matrix material to form domainportions under a specific condition, and the phase-separated domainportions may be selectively removed to form spaces or patterns having anano-scaled feature size. The nano-scaled feature size may range from afew nanometers to several tens of nanometers.
A self-assembled structure of the BCP layer may have a cylindrical shapeor a lamellar shape according to a volume ratio of two or more distinctpolymer blocks included in the BCP layer, an annealing temperature forthe phase separation of the BCP layer, a molecule size of the polymerblocks included in the BCP layer, and a molecular weight of the polymerblocks included in the BCP layer. That is, the phase-separated domainportions of the polymer blocks may have a cylindrical shape or alamellar shape. When the self-assembled structure of the BCP layer has acylindrical shape, the BCP layer may be used to form a hole arraypattern. When the self-assembled structure of the BCP layer has alamellar shape, the BCP layer may be used to form a line and spacepattern.
 Various embodiments of the present disclosure may be applied tofabrication of highly integrated semiconductor devices, for example,dynamic random access memory (DRAM) devices, phase changeable randomaccess memory (PcRAM) devices or resistive random access memory (ReRAM)devices. In addition, the following embodiments may be applied tofabrication of memory devices such as static random access memory (SRAM)devices, flash memory devices, magnetic random access memory (MRAM)devices or ferroelectric random access memory (FeRAM) devices. Thefollowing embodiments may also be applied to fabrication of logicdevices, such as control devices, central processing units (CPU) orarithmetic logic units (ALU).
FIGS. 1 to 3 are plan views illustrating a process for obtaining alayout of a guide pattern used in a method of forming patterns accordingto an embodiment.
Referring to FIG. 1, a layout 10 of a target feature may include alayout 11 having an array of first target features 12 that are to betransferred onto a substrate to form fifth openings, and may include alayout 19 having a second target feature 18 that is to be transferredonto the substrate to form a second isolated pattern. The layout 11 ofthe first target features 12 and the layout 19 of the second targetfeature 18 may be located at different regions. For example, the layout11 and the layout 19 may be adjacent to each other. The first targetfeatures 12 may be disposed in a dense pattern region such as a cellregion, and the second target feature 18 may be disposed in an isolatedpattern region such as a peripheral region. The second target feature 18may have a line shape or a polygonal shape.
 In the layout 11, the first target features 12 may include pillarfeatures 13 for portions of guide patterns, and first domain features 14between the pillar features 13. The first domain features 14 may besurrounded by four adjacent pillar features 13 during phase separationof the BCP material. Accordingly, the pillar features 13 may beseparated from the first domain features 14 according to the phaseseparation of the BCP material.
Referring to FIGS. 1 and 2, a layout 20 may include a layout 21 havingpillar features 23 and a layout 29 having a first isolated pattern 28and a first opening trench portion 27. The layout 21 having the pillarfeatures 23 may be obtained by separating the first domain features 14from the layout 11 of the first target features 12. The layout of thefirst isolated pattern 28 may be obtained by resizing the second targetfeature 18 corresponding to the second isolated pattern. For example,the layout of the first isolated pattern 28 may be obtained bytwo-dimensionally shrinking the second target feature 18 by “R1” asshown in FIG. 2. In such a case, the layout of the first opening trenchportion 27 may be obtained by removing the layout of the first isolatedpattern 28 from the second target feature 18.
 Referring to FIG. 3, a layout 30 of guide patterns may include pillarfeatures 33 arrayed in a region 31, a template portion 39 exposing theregion 31, and a first isolated pattern 38 disposed in the templateportion 39 spaced apart from the template portion 39. The pillarfeatures 33 may correspond to the pillar features 23 of FIG. 2, and thefirst isolated pattern 38 may correspond to the first isolated pattern28 of FIG. 2. A region 37 between the template portion 39 and the firstisolated pattern 38 may correspond to a first opening trench portion 27of FIG. 2. That is, the first isolated pattern 38 may be surrounded bythe first opening trench portion 37 in the template portion 39.
FIG. 4 is a plan view illustrating a layout 40 of a blocking pattern 48.
Referring to FIGS. 1 to 4, the layout 40 may include the blockingpattern 48 that is transferred onto the first isolated pattern 38 toform a mask pattern covering the first isolated pattern 38. The maskpattern formed by the blocking pattern 48 may remain to protect thefirst isolated pattern 38 while the template portion 39 is selectivelyremoved. Thus, the first isolated pattern 38 may still remain due to thepresence of the mask pattern formed by the blocking pattern 48 duringremoval of the template portion 39. The blocking pattern 48 may beobtained by two-dimensionally enlarging the first isolated pattern 38.For example, the blocking pattern 48 may have a layout of the secondisolated pattern 18. In exemplary embodiments, the blocking pattern 48may be formed by two-dimensionally enlarging the second isolated pattern18 to overlap with a portion of the template portion 39 adjacent to thesecond isolated pattern 18.
 FIGS. 5 to 18 are cross-sectional views taken along a line C1-C1′ ofFIGS. 1 to 3 to illustrate a method of forming patterns according to anembodiment.
FIG. 5 illustrates a step of forming mask patterns 633, 638 and 639 on aguide layer 500.
Referring to FIGS. 1 to 5, the mask patterns 633, 638 and 639 may beformed on the guide layer 500. The mask patterns 633, 638 and 639 mayserve as etch masks when the guide layer 500 is etched in a subsequentprocess. The mask patterns 633, 638 and 639 may include first patterns633 corresponding to the pillars 33, a second pattern 638 correspondingto the first isolated pattern 38, and a third pattern 639 correspondingto the template portion 39. Thus, a space region 637 between the secondpattern 638 and the third pattern 639 may have substantially the sameshape as the first opening trench portion 37. The mask patterns 633, 638and 639 may include a photoresist material.
 The guide layer 500 may be patterned in a subsequent process to formguide patterns, which are described with reference to FIGS. 1 to 3 anddefine positions of the domains in the phase-separated BCP layer. Theguide layer 500 may be formed on a semiconductor substrate 100. Thesemiconductor substrate 100 may include a first region 131 on which thepillars 33 are disposed with high density, and may include a secondregion 139 on which the second isolated pattern 18 is disposed. Thesecond region 139 may be distinct from and adjacent to the first region131. The guide layer 500 may include a spin-on-carbon (SOC) layer 501disposed on an underlying layer 400. The SOC layer 501 may have athickness ranging from about 700 to about 800 angstroms. The guide layer500 may further include a capping layer 503 disposed on the SOC layer501. The capping layer 503 may be formed of a silicon oxynitride (SiON)layer having a thickness of about 300 angstroms.
The underlying layer 400 may be used to pattern a part of or an entirehard mask in a subsequent patterning process. For example, theunderlying layer 400 may serve as one of multi-layers in a hard masksystem. A second etch target layer 300 may be formed between theunderlying layer 400 and the semiconductor substrate 100. In addition, afirst etch target layer 200 may be formed between the second etch targetlayer 300 and the semiconductor substrate 100. The first or second etchtarget layer 200 or 300 may be one of the hard mask system, or may beselectively etched using the hard mask system as an etch mask in asubsequent process.
 The first etch target layer 200 may be formed of an interlayerinsulation layer including a silicon oxide layer such as atetra-ethyl-ortho-silicate (TEOS) layer having a thickness of about 2200angstroms. Alternatively, the first etch target layer 200 may be formedof a conductive layer such as a doped polysilicon layer. The second etchtarget layer 300 may be formed by depositing an amorphous SOC layerhaving a thickness ranging from about 730 to about 1000 angstroms on thefirst etch target layer 200. The underlying layer 400 may be formed onthe second etch target layer 300 and may include a silicon oxynitride(SiON) layer having a thickness ranging from about 300 to about 350angstroms.
FIG. 6 illustrates a step of forming an array of pillars 530, a firstisolated pattern 580 and a template portion 590.
Referring to FIG. 6, the guide layer 500 may be etched using the maskpatterns 633, 638 and 639 as etch masks, thereby forming the array ofthe pillars 530, the first isolated pattern 580 and the template portion590. The array of the pillars 530 may be formed on the first region 131of the semiconductor substrate 100, and the first isolated pattern 580and the template portion 590 may be formed on the second region 139 ofthe semiconductor substrate 100. A space region between the firstisolated pattern 580 and the template portion 590 may correspond to afirst opening trench portion 570.
 The pillars 530 may be arrayed so that four adjacent pillars 530 arepositioned to form a rectangular shape. Alternatively, the pillars 530may be arrayed so that three adjacent pillars 530 are positioned to forma triangular shape. The pillars 530 may be arrayed to have a gap 531between two adjacent pillars 530 which are disposed on the line C1-C1′.As illustrated in FIG. 3, a gap between two adjacent pillars 33 whichare arrayed on a horizontal line may be narrower than the gap betweentwo adjacent pillars 33 which are arrayed on the diagonal portion of theline C1-C1′. The pillars 530 may serve as guide patterns that induceself-assembly of the BCP layer which is formed in a subsequent process.The first isolated pattern 580 and the template portion 590 may serve asguide patterns that prevent the self-assembly of the BCP layer on thesecond region 139.
FIG. 7 illustrates a step of forming a separation wall layer 600.
Referring to FIGS. 6 and 7, the separation wall layer 600 may includefirst separation wall portions 602A covering sidewalls of the pillars530, and second separation wall portions 602B covering sidewalls of thefirst opening trench portion 570. The separation wall layer 600 mayinclude first extensions 601A extending from the first separation wallportions 602A to cover portions of the underlying layer 400 exposed bythe gaps 531, and second extensions 603A extending from the firstseparation wall portions 602A to cover top surfaces of the pillars 530.The separation wall layer 600 may further include third extensions 601Bextending from the second separation wall portions 602B to coverportions of the underlying layer 400 exposed by the first opening trenchportion 570, and fourth extensions 603B extending from the secondseparation wall portions 602B to cover top surfaces of the firstisolated pattern 580 and the template portion 590.
 The separation wall layer 600 may provide recessed regions defined bygaps 631 between the pillars 530, and a recessed region defined by a gap637 between the first isolated pattern 580 and the template portion 590.The separation wall layer 600 may be formed of an insulation layerhaving an etch selectivity with respect to the pillars 530 and theunderlying layer 400. For example, the separation wall layer 600 may beformed of an ultra-low temperature oxide (ULTO) layer having a thicknessof about 200 angstroms.
FIG. 8 illustrates a step of forming the BCP layer 700.
Referring to FIG. 8, the BCP layer 700 may be formed on the separationwall layer 600 to fill the gaps 631 and 637 which are provided by thepillars 530, the first isolated pattern 580 and the template portion590. The BCP layer 700 may include a polystyrene-poly (meta methylacrylate) block copolymer (PS-b-PMMA) material or a polystyrene-poly (dimethyl siloxane) (PS-PDMS) block copolymer material. When the BCP layer700 is formed of the PS-b-PMMA material including PS blocks and PMMAblocks, a volume ratio of the PS blocks to the PMMA blocks may becontrolled to be within the range from about 7:3 to about 5:5. Thevolume ratio of the PS blocks to the PMMA blocks or molecular weights ofthe PS block and the PMMA block may be appropriately controlledaccording to a process scheme. For example, the PS-b-PMMA material mayhave a PS block content of about 60 vol. % to about 80 vol. % and a PMMAblock content of about 20 vol. % to about 40 vol. %.
 FIGS. 51 to 53 are schematic views illustrating the phase separation ofthe BCP layer 700 for exemplary embodiments. The BCP layer 700 may be afunctional polymer material made by combining polymer blocks having twoor more distinct structures into a single block copolymer materialthrough a covalent bond, as illustrated in FIG. 51. As illustrated inFIG. 51, the BCP layer 700 may have a chain shape including polymerblocks ‘A’ and ‘B’, which are connected to each other by a covalent bondthrough a link point. Referring to FIG. 52, the BCP layer 700 may becoated to have a homogeneous phase. Referring to FIG. 53, the polymerblocks having distinct structures in the BCP layer 700 may havedifferent miscibility and different solubility from each other due todifferent chemical structures thereof. That is, the polymer blockshaving distinct structures are immiscible with each other at a certaintemperature. Thus, the BCP layer 700 may be phase-separated through anannealing process to provide a self-aligned structure. Accordingly, theBCP layer 700 having a homogeneous phase may be phase-separated into adomain ‘A’ in which polymer blocks ‘A’ are ordered and a domain ‘B’ inwhich polymer blocks ‘B’ are ordered, through an annealing process. Assuch, polymer blocks of the BCP layer 700 may be phase-separated orselectively dissolved in a liquid state or in a solid state to form aself-assembled structure.
 A nano-scale structure having a specific shape through the self-assemblyof the BCP layer 700 may be affected by a physical property and/or achemical property of the polymer blocks of the BCP layer 700. When a BCPlayer including two distinct polymer blocks is self-assembled on thesubstrate, the self-assembled structure of the BCP layer may have athree dimensional cubic shape, a three dimensional double helix shape, atwo dimensional hexagonal packed column shape, a two dimensional lamellashape and so forth according to a volume ratio of the polymer blocksincluded in the BCP layer, an annealing temperature for phase separationof the BCP layer, and a molecule size of the polymer blocks included inthe BCP layer.
In exemplary embodiments, the BCP layer 700 may be formed ofpolybutadiene-polybutylmethacrylate block copolymer,polybutadiene-polydimethylsiloxane block copolymer,polybutadiene-polymethylmethacrylate block copolymer,polybutadienepolyvinylpyridine block copolymer,polybutylacrylate-polymethylmethacrylate block copolymer,polybutylacrylate-polyvinylpyridine block copolymer,polyisoprene-polyvinylpyridine block copolymer,polyisoprene-polymethylmethacrylate block copolymer,polyhexylacrylatepolyvinylpyridine block copolymer,polylsobutylene-polybutylmethacrylate block copolymer,polyisobutylene-polymethylmethacrylate block copolymer,polyisobutylene-polybutylmethacrylate block copolymer,polylsobutylenepolydimethylsiloxane block copolymer,polybutylmethacrylatepolybutylacrylate block copolymer,polyethylethylene-polymethylmethacrylate block copolymer,polystyrene-polybutylmethacrylate block copolymer,polystyrene-polybutadiene block copolymer, polystyrene-polyisopreneblock copolymer, polystyrene-polydimethylsiloxane block copolymer,polystyrene-polyvinylpyridine block copolymer,polyethylethylene-polyvinylpyridine block copolymer,polyethylene-polyvinylpyridine block copolymer,polyvinylpyridinepolymethylmethacrylate block copolymer,polyethyleneoxide-polyisoprene block copolymer,polyethyleneoxide-polybutadlene block copolymer,polyethyleneoxide-polystyrene block copolymer,polyethyleneoxidepolymethylmethacrylate block copolymer,polyethyleneoxide-polydimethylsiloxane block copolymer,polystyrene-polyethyleneoxide block copolymer and so forth.
FIG. 9 illustrates a step of phase-separating the BCP layer 700.
Referring to FIGS. 6 to 9, the BCP layer 700 may be phase-separatedthrough an annealing process into first domains 710 respectively locatedat central portions of the gaps 631 between the pillars 530 arrayed onthe line C1-C1′, and a second domain 730 disposed between the pillars530 to surround the first domains 710 and to isolate the first domains710 from each other. The first domains 710 may fill recessed regionsprovided by the second domain 730. Thus, the first domains 710 may havepost shapes and may be surrounded by the second domain 730.
 While the BCP layer 700 is phase-separated through an annealing process,a portion of the BCP layer 700 filling the gap 637 provided by theseparation wall layer 600 on the second region 139 may bephase-separated into a third domain 750 and a fourth domain 770surrounding the third domain 750 in the gap 637. In such a case, thethird domain 750 may insufficiently expand toward a bottom surface ofthe gap 637 to have a smaller depth than the first domains 710. This isdue to the gap 637 having a smaller width than the gaps 631. Since thethird domain 750 does not sufficiently expand toward the bottom surfaceof the gap 637, a bottom surface D1 of the third domain 750 may belocated adjacent to an entrance of the gap 637. That is, the bottomsurface D1 of the third domain 750 may be located at a higher level thanbottom surfaces D2 of the first domains 710. Accordingly, a bottomportion 771 of the fourth domain 770 surrounding the bottom surface D1and sidewalls of the third domain 750 may be thicker than bottomportions 731 of the second domain 730. In exemplary embodiments, the gap637 may have an Insufficient space to accommodate two different domains750 and 770. In such a case, a portion of the BCP layer 700 filling thegap 637 may not be phase-separated even though the BCP layer 700 isannealed.
 The phase separation of the BCP layer 700 may be achieved by annealingthe BCP layer 700 at a temperature exceeding a glass transitiontemperature Tg of the BCP layer 700 to rearrange the polymer blocks ofthe BCP layer 700. For example, to rearrange the polymer blocks of theBCP layer 700, the BCP layer 700 may be annealed at a temperatureranging from about 100 to about 190 degrees Celsius for a time rangingfrom about six minutes to about twenty four hours.
FIG. 10 illustrates a step of forming a plurality of second openings 701and a seventh opening 705.
Referring to FIGS. 6 to 10, the first domains 710 may be selectivelyremoved to form the plurality of second openings 701 located between thepillars 530. While the first domains 710 are selectively removed, thethird domain 750 may also be removed to form the seventh opening 705 inthe first opening trench portion 570. In such a case, the seventhopening 705 may be shallower than the second openings 701.
FIG. 11 illustrates a step of forming second extensions 701B of thesecond openings 701.
Referring to FIGS. 6 to 11, the bottom portions 731 of the second domain730 exposed by the second openings 701 may be selectively removed toform first extensions 701A of the second openings 701 extending from thesecond openings 701. While the bottom portions 731 of the second domain730 are selectively removed, the bottom portion 771 of the fourth domain770 exposed by the seventh opening 705 may be partially removed to forman extension 705B of the seventh opening 705. However, the extension705B of the seventh opening 705 may be formed not to penetrate thebottom portion 771 of the fourth domain 770. As a result, a feature ofthe seventh opening 705 may not be transferred into the bottom portion771 of the fourth domain 770.
 Subsequently, the first extensions 601A of the separation wall layer 600exposed by the first extensions 701A of the second openings 701 may beselectively removed to form the second extensions 701B of the secondopenings 701 extending from the second openings 701. While the firstextensions 601A of the separation wall layer 600 are selectivelyremoved, the second extensions 603A of the separation wall layer 600covering the top surfaces of the pillars 530 and the template portion590 may also be removed to expose the top surfaces of the pillars 530and the template portion 590.
FIG. 12 illustrates a step of forming a blocking pattern 848.
 Referring to FIGS. 4 to 12, the blocking pattern 848 may cover the firstisolated pattern 580. Before the blocking pattern 848 is formed,residues of the BCP layer 700 including the second domain 730 and thefourth domain 770 may be removed. After the residues of the BCP layer700 are removed, a sacrificial layer 810 may be formed on the pillars530, the first isolated pattern 580 and the template portion 590 to fillthe second extensions 701B of the second openings 701, the gaps betweenthe pillars 530, and the gap between the first isolated pattern 580 andthe template portion 590. The blocking pattern 848 may extend to coverthe second separation wall portions 602B adjacent to the first isolatedpattern 580. The blocking pattern 848 may be formed by transferring alayout feature of the blocking pattern 848. The blocking pattern 848 maycover all of the first isolated pattern 580, the second separation wallportions 602B and the third extensions 601B. However, in exemplaryembodiments, the blocking pattern 848 may be laterally shifted from anexpected position due to an overlay shift during an alignment andexposure process. Even though the blocking pattern 848 is laterallyshifted, the first isolated pattern 580 may still be sealed with thesecond separation wall portions 602B and the blocking pattern 848 as faras the first isolated pattern 580 is laterally shifted within anallowable overlay range since the second separation wall portions 602Band the blocking pattern 848 are disposed around the first isolatedpattern 580.
FIG. 13 is a cross-sectional view illustrating a blocking pattern 848Awhich is laterally shifted.
 Referring to FIGS. 6 to 13, in the event that the blocking pattern 848Ais laterally shifted by “S”, the blocking pattern 848A may cover aportion of the template portion 590. Nevertheless, the blocking pattern848A may have an alignment margin of about “R2” corresponding to a widthof the first opening trench portion 570. That is, even though theblocking pattern 848A is shifted so that an edge of the blocking pattern848A is disposed in the first opening trench portion 570, the firstisolated pattern 580 may still be sealed with the second separation wallportions 602B and the third extensions 601B.
FIG. 14 illustrates a step of selectively removing the pillars 530 andthe template portion 590.
Referring to FIGS. 6 to 14, the pillars 530 and the template portion 590may be selectively etched and removed using the planarized sacrificiallayer 810, the first and second separation wall portions 602A and 602B,the first and third extensions 601A and 601B, and the blocking pattern848 as etch masks. The pillars 530 may be removed to form third openings633, and the template portion 590 may be removed to form a fourthopening 639.
FIG. 15 illustrates a step of removing the blocking pattern 848.
Referring to FIGS. 14 and 15, the blocking pattern 848 and theplanarized sacrificial layer 810 may be selectively removed to exposethe second extensions 701B of the second openings 701 extending from thesecond openings 701.
FIG. 16 illustrates a step of forming fifth openings 402 and a sixthopening 439.
 Referring to FIGS. 6 to 16, the underlying layer 400 on the first region131 may be etched using the first separation wall portions 602A and thefirst extensions 601A as etch masks, thereby forming the fifth openings402 that extend from the second extensions 701B of the second openings701 and extend from the third openings 633. While the fifth openings 402are formed, the underlying layer 400 may be patterned to include a firstpattern 410 that provides the fifth openings 402. In addition, theunderlying layer 400 on the second region 139 may be etched using thefirst isolated pattern 580, and the second separation wall portion 602Band the third extension 601B as etch masks, thereby forming the sixthopening 439 that extends from the fourth opening 639. Accordingly, theunderlying layer 400 may be patterned to include a second pattern 418that provides the sixth opening 439. The second pattern 418 maycorrespond to the second isolated pattern. The fifth openings 402 andthe sixth opening 439 may be simultaneously formed.
FIGS. 17 and 18 illustrate a step of forming extensions 202 of the fifthopenings 402 and an extension 239 of the sixth opening 439.
 Referring to FIGS. 17 and 18, the second etch target layer 300 and thefirst etch target layer 200 may be etched using the first pattern 410and the second isolated pattern 418 as etch masks, thereby forming theextensions 202 of the fifth openings 402 and the extension 239 of thesixth opening 439 that penetrate the first and second etch target layers200 and 300. As a result, a second pattern 318 of the second etch targetlayer 300 and a second pattern 218 of the first etch target layer 200may be provided by the extension 239 of the sixth opening 439 on thesecond region 139, and a first pattern 310 of the second etch targetlayer 300 and a first pattern 210 of the first etch target layer 200 maybe provided by the extensions 202 of the fifth opening 402 on the firstregion 131. Subsequently, the first pattern 410 of the underlying layer400, the second isolated pattern 418, and the first and second patterns310 and 318 of the second etch target layer 300 may be removed to leavethe second pattern 218 having a planar shape of the second isolatedpattern 418 and the first pattern 210 providing the extensions 202 ofthe fifth opening 402.
FIGS. 19 to 22 are plan views illustrating a process for obtaining alayout of a guide pattern used in a method of forming patterns accordingto another embodiment.
 Referring to FIG. 19, a layout 2011 may include an array of first targetfeatures 2015 which are to be transferred onto the substrate to formpatterns. The first target features 2015 may form fifth openings thatpenetrate a material layer disposed on the substrate. The first targetfeatures 2015 may be regularly and repeatedly arrayed to have a certainpitch, for example a first pitch P1. The first target features 2015 mayinclude pillar features 2012 arrayed in a diagonal direction and firstdomain features 2014 disposed between the pillar features 2012.
Referring to FIGS. 19 and 20, a layout 2019 may include an array ofsecond target features 2018. The layout 2011 of the first targetfeatures 2015 shown in FIG. 19 and the layout 2019 of the second targetfeatures 2018 shown in FIG. 20 may be located at two different regions.For example, the layout 2011 and the layout 2019 may be adjacent to eachother. The second target features 2018 may provide sixth openings thatpenetrate a material layer disposed on the substrate. Each of the secondtarget features 2018 may have a size which is the same as or differentfrom a size of each of the first target features 2015. While the firsttarget features 2015 are arrayed to have the first pitch P1, the secondtarget features 2018 may be arrayed to have a second pitch P2. Thesecond pitch P2 may be greater than the first pitch P1. For example, thesecond pitch P2 may be twice or more of the first pitch P1.
Referring to FIGS. 19 to 21, a layout 2021 may be obtained by separatingthe pillar features 2012 from the layout 2011 of the first targetfeatures 2015. That is, the layout 2021 may include pillar features 2022corresponding to the pillar features 2012 without first domain features2024 corresponding to the first domain features 2014.
 Referring to FIGS. 20 to 22, a layout 2029 may correspond to a layout offirst opening features 2028 obtained by resizing the second targetfeatures 2018. Each of the first opening features 2028 may provide aspace in which a third domain 2078 is induced. As a result, the secondtarget features 2018 may be located at the positions of the thirddomains 2078, respectively.
FIGS. 23 to 50 are cross-sectional views and plan views illustrating amethod of forming patterns according to another embodiment.
FIGS. 23 and 24 illustrate a step of forming mask patterns 2622 and 2627on a guide layer 2500. FIG. 23 is a cross-sectional view taken along aline C21-C21′ of FIG. 21, and FIG. 24 is a cross-sectional view takenalong a line C22-C22′ of FIG. 22.
Referring to FIGS. 21 to 24, a semiconductor substrate 2100 may have afirst region 2121 and a second region 2129 that are distinct from eachother, and the guide layer 2500 may be formed by sequentially stacking aSOC layer 2501 and a capping layer 2503 on an entire surface of thesemiconductor substrate 2100. The capping layer 2503 may be formed of asilicon oxynitride (SiON) layer. The pillar features 2022 of the layout2021 may be transferred onto the semiconductor substrate 2100 to realizethe first mask patterns 2622 providing openings 2623 on the first region2121, and the first opening features 2028 of the layout 2029 may betransferred onto the semiconductor substrate 2100 to realize the secondmask patterns 2627 providing openings 2628 on the second region 2129.The first and second mask patterns 2622 and 2627 may include aphotoresist material.
 The guide layer 2500 may be patterned in a subsequent process to formguide patterns that define positions of domains in a phase-separated BCPlayer. The guide layer 2500 may be formed on an underlying layer 2400and may include an SOC layer having a thickness ranging from about 700to about 800 angstroms. A capping layer (not shown) may be additionallyformed on the SOC layer. The capping layer may be formed of a siliconoxynitride (SiON) layer having a thickness of about 300 angstroms.
The underlying layer 2400 may be used to pattern a portion or an entirehard mask in a subsequent patterning process. For example, theunderlying layer 2400 may serve as one of multi-layers in a hard masksystem. A second etch target layer 2300 may be formed between theunderlying layer 2400 and the semiconductor substrate 2100. In addition,a first etch target layer 2200 may be formed between the second etchtarget layer 2300 and the semiconductor substrate 2100. The first orsecond etch target layer 2200 or 2300 may be one of the hard masksystem, or may be selectively etched using the hard mask system as anetch mask in a subsequent process.
The first etch target layer 2200 may be formed of an interlayerinsulation layer including a silicon oxide layer such as atetra-ethyl-ortho-silicate (TEOS) layer having a thickness of about 2200angstroms. Alternatively, the first etch target layer 2200 may be formedof a conductive layer such as a doped polysilicon layer. The second etchtarget layer 2300 may be formed by depositing an amorphous SOC layerhaving a thickness ranging from about 730 to about 1000 angstroms on thefirst etch target layer 2200. The underlying layer 2400 may be formed onthe second etch target layer 2300 and may include a silicon oxynitride(SiON) layer having a thickness ranging from about 300 to about 350angstroms.
 FIGS. 25 and 26 illustrate a step of forming an array of pillars 2530and a template portion 2570. FIG. 25 is a cross-sectional view takenalong a line C21-C21′ of FIG. 21, and FIG. 26 is a cross-sectional viewtaken along a line C22-C22′ of FIG. 22.
Referring to FIGS. 21 to 26, the guide layer 2500 may be etched usingthe mask patterns 2622 and 2627 as etch masks, thereby forming the arrayof the pillars 2530 having the same shape as the pillar features 2022and the template portion 2570 providing first openings 2578 having thesame shape as the first opening features 2028. The array of the pillars2530 may be formed on the first region 2121 of the semiconductorsubstrate 2100, and the template portion 2570 may be formed on thesecond region 2129 of the semiconductor substrate 2100.
The pillars 2530 may be arrayed so that four adjacent pillars 2530 arepositioned to form a rectangle shape. Alternatively, the pillars 2530may be arrayed so that three adjacent pillars 2530 are positioned toform a triangular shape. The pillars 2530 may be arrayed to have a gap2533 between two adjacent ones of the pillars 2530 which are disposed ona diagonal portion of the line C21-C21′. As illustrated in FIG. 21, agap between two adjacent pillar features 2022 which are arrayed on ahorizontal line may be narrower than the gap between two adjacent pillarfeatures 2022 which are arrayed on the diagonal portion of the lineC21-C21′. The pillars 2530 may serve as guide patterns that induceself-assembly of the BCP layer which is formed in a subsequent process.
