{"ast_node_type":"other","tokens":[{"end":45,"kind":"keyword","start":0,"text":"InlineAsmRegOrRegClass::Reg(reg)"}]}
        InlineAsmRegOrRegClass::Reg(reg) => {
        // For vector registers LLVM wants the register name to match the type size.
            if let Some(idx) = xmm_reg_index(reg) {